The inventive concepts described herein relate to semiconductor memory devices, and more particularly, the inventive concepts relate to semiconductor memory devices in which redundancy wordlines are shared between memory blocks.
Semiconductor memory devices include a plurality of memory cells arranged in a matrix of rows and columns. Among the large numbers of memory cells within the matrix, some of the memory cells may be defective as the result of a variety of causes, including substrate imperfections, layout defects, processing defects, and the like. Rather than scraping the entire memory device when defects occur, yields can be improved by replacing a defective with a redundancy memory cell included within the device. Generally, repair operations of this type are carried out by enabling a redundancy wordline in lieu of a wordline containing one or more defective memory cells.